Talent & Ecosystem Depth: Key To HCL–Foxconn’s Chip Success

HCL–Foxconn’s new joint venture (JV) Outsourced Semiconductor Assembly Test (OSAT) facility in Gautam Buddha Nagar, is a step towards self-reliance in the semiconductor supply chain. The OSAT will be producing display driver chips (DDICs), a first of its kind in India’s chip ecosystem.

This JV named India Chip Pvt Ltd is a 60:40 joint venture between HCL Group and Foxconn. The advanced OSAT facility is expected to be operational by 2028. The company has earmarked an investment of INR 3,700 crores over the next few years in the state-of-the-art facility that will produce DDICs. The investment is expected to create over 3,500 direct and indirect jobs, build local supply chains, and attract ecosystem partners across the semiconductor value chain.

DDIC market is not a fast-growing market but still it was one of the categories which was highly constrained during pandemic supply chain glut. The pandemic’s supply chain crunch revealed its vulnerability, and India’s entry into packaging DDICs marks a steady, strategic foothold.

This OSAT has significant potential for both India’s domestic and export markets. On the chip front, advanced packaging is a crucial point in the ongoing artificial Intelligence (AI) supply chain, and this facility could serve as an entry into the AI hardware chain. “Beyond this, DDICs are also the highest-volume advanced-package chips used in smartphones, laptops, and similar devices, so development on this front provides a qualification platform that gives volume and yield learning. Establishing a facility here would deepen local value addition for a component that is still largely imported at the module level,” said Tarun Pathak, research director, Counterpoint Research.

DDICs are used to control the pixel-level data in various display panels (LCD, OLED, AMOLED) to produce images. They are critical components in both consumer electronics and industrial applications. Currently, DDICs are predominantly imported in India, because dependence on imports for electronic components is significant here. “Today, the electronics ecosystem in India is growing and this is a great opportunity to lean into. As India mostly imports these chips, this OSAT will cater to almost 25 per cent of the domestic requirement of these chips. One of the possible synergies that we could explore is fab services,” said Roshni Nadar Malhotra, chairperson, HCL Group.

“We want to create an end-to-end value chain and this is just the beginning. The new unit will require hundreds of high-tech engineers. To leverage the best in talent, we will work in synergy with Foxconn and HCL’s educational institutions to develop specialized skills,” she added.

Some of the primary challenges that display driver chips may face include the lack of foundry and ecosystem depth compared to countries like Taiwan and Korea. Furthermore, the DDIC ecosystem is closely tied to panel makers, an area where India currently lacks presence. “Success will depend on having a strong technology partner. Another important aspect is talent: while India has skilled engineers, it does not yet possess the process-specific know-how. Knowledge transfer from expatriates will therefore be the key,” explained Pathak.

As demand goes up and technology transition happens, it also opens lots of challenges for new entrants such as HCL-Foxconn. “DDIC chip production is also moving to a more advanced but still matured nodes in 90-70nm range for LCDs and potentially to 28nm for OLED. The in-tow packaging capabilities are also evolving. Achieving high-yield gold bumping interconnection process expertise and yields respectively is a major hurdle. Further, packaging technologies will also move from chip on glass to chip on film or chip on plastic becoming more complex. This will be thus challenging especially against established Taiwanese competitors such as Chipbond Tech, ChipMOS Tech, ASE (SPIL) and JCET/Huatian in China who enjoy process and scale leadership in this space. This is where HCL-Foxconn will need to plan their roadmap and get on to the experience curve of process innovation and IP to ensure higher yields,” explained Neil Shah, cofounder, Counterpoint Research.

Talking about the processes, she said, “All the processes, including gold bumping, die processing (wafer-level packaging), and chip probe testing will be done here with the help of high tech engineers.” These represent the crucial back-end-of-line (BEOL) and wafer-level packaging stages in semiconductor manufacturing.

When asked about establishing a foundry for DDIC, the chairperson emphasized that the current focus area is the OSAT. With a planned capacity to process 20,000 wafers per month, the facility will focus on meeting domestic demands and around 30 per cent of the produced chips will be exported. Later, additional lines will be setup which can actually move production to 40,000 wafers or even 80,000 wafers ahead.

By 2029, India is expected to achieve the capability to design and manufacture chips required for nearly 70–75 per cent of domestic applications. Advancing on this foundation, the next phase under Semicon 2.0 will focus on advanced manufacturing, with a clearly defined roadmap to achieve three nanometre and two nanometre technology nodes. By 2035, India aims to be among the top semiconductor nations globally.

The foundation of this growth was laid with the approval of India Semiconductor Mission 1.0 by the Union Cabinet in December 2021. The mission is supported by an incentive framework of INR 76,000 crore, offering fiscal support of up to 50 per cent for silicon fabs, compound semiconductor facilities, assembly and testing units, and chip design.